A parallel architecture for probabilistic relaxation operations on images

摘要

The design of a parallel architecture for executing probabilistic relaxation operations on two dimensional images is addressed. First of all, the concerned relaxation process is divided into three different parallel operations, i.e. systolic, simultaneous, and pipelined. All these parallel operations are mapped onto a linear array architecture that runs smoothly without any bottleneck in the data flows. The proposed architecture and its components are described. An illustrative running of the relaxation process for an image thresholding application on the architecture is described in some details. The hardware implementation and CAD logic simulation are then given. Finally, performance comparison between the proposed architecture and some existing ones is reported.