Design and use of DIP-1: A fast, flexible and dynamically microprogrammable pipelined image processor

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摘要

The design of a fast, flexible and dynamically microprogrammable pipelined image processor is presented. The machine is especially suited, though not completely devoted, to perform local operations (up to 16 × 16) of both logical and arithmetic character on pictures, stored in a random access image memory in a 256 level grey scale. Separate parts of the machine take care of data manipulation and address generation. The machine's functioning is illustrated by discussing the way in which arithmetic N × N neighbourhood operations and binary 3 × 3 neighbourhood operations were implemented and finally the software supporting microprogram development and debugging and the run-time support software is described.

论文关键词:Image processing hardware,Pipelined image processor,Reconfigurable pipeline,Microprogrammable image processor,Neighbourhood operations,Binary image operations,Microprogramming support software,Debugging software

论文评审过程:Received 9 January 1980, Revised 16 May 1980, Accepted 22 December 1980, Available online 19 May 2003.

论文官网地址:https://doi.org/10.1016/0031-3203(81)90077-7