Computational efficiency analysis of Wu et al.’s fast modular multi-exponentiation algorithm

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Very recently, for speeding up the computation of modular multi-exponentiation, Wu et al. presented a fast algorithm combining the complement recoding method and the minimal weight binary signed-digit representation technique. They claimed that the proposed algorithm reduced the number of modular multiplications from 1.503k to 1.306k on average, where the value k is the maximum bit-length of two exponents. However, in this paper, we show that their claim is unwarranted. We analyze the computational efficiency of Wu et al.’s algorithm by modeling it as a Markov chain. Our main result is that Wu et al.’s algorithm requires 1.471k modular multiplications on average.

论文关键词:Modular multi-exponentiation,Complement recoding,Minimal weight binary signed-digit (BSD) representation,Computational efficiency,Markov chain

论文评审过程:Available online 27 February 2007.

论文官网地址:https://doi.org/10.1016/j.amc.2007.02.066