Analysis of evolutionary techniques for the automated implementation of digital circuits
作者：
Highlights：
• Fully digital evolvable 8 bit adder implementation with fully automated intelligent system.
• Investigation of different methods of genetic algorithm on hardware implementation.
• An evolutionary hardware achieved with the minimum convergence time as well as the number of components.
• Potential for self-programming, self-reconfigurable hardware implementation.
摘要
•Fully digital evolvable 8 bit adder implementation with fully automated intelligent system.•Investigation of different methods of genetic algorithm on hardware implementation.•An evolutionary hardware achieved with the minimum convergence time as well as the number of components.•Potential for self-programming, self-reconfigurable hardware implementation.
论文关键词：Evolvable Hardware,Logic circuit,Evolutionary algorithm,Genetic algorithm
论文评审过程：Available online 11 June 2015, Version of Record 24 June 2015.
论文官网地址：https://doi.org/10.1016/j.eswa.2015.06.005
