Fast adaptive motion estimation algorithm and its efficient VLSI system for high definition videos
作者：
Highlights：
• Adaptive motion estimation algorithm and VLSI design that can process HD frames.
• The algorithm exploits the considerable correlation within neighboring macroblocks.
• VLSI design generates adaptive pattern and uses interleaved memory organization.
• Working at 243 MHz, the design can process 66 HD (1280 × 720) frames per second.
• The design consumes an area of 38.2 K gate equivalent and 36 mW of dynamic power.
摘要
•Adaptive motion estimation algorithm and VLSI design that can process HD frames.•The algorithm exploits the considerable correlation within neighboring macroblocks.•VLSI design generates adaptive pattern and uses interleaved memory organization.•Working at 243 MHz, the design can process 66 HD (1280 × 720) frames per second.•The design consumes an area of 38.2 K gate equivalent and 36 mW of dynamic power.
论文关键词：Adaptive search algorithm,Fast motion estimation,VLSI architecture,Novel memory organization,Data re-use
论文评审过程：Received 19 September 2017, Revised 18 January 2018, Accepted 12 February 2018, Available online 13 February 2018, Version of Record 22 February 2018.
论文官网地址：https://doi.org/10.1016/j.eswa.2018.02.020
