Lower bounds for Boolean circuits of bounded negation width

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摘要

The negation width of a Boolean AND, OR, NOT circuit computing a monotone Boolean function f is the minimum number w such that the unique formal DNF produced (purely syntactically) by the circuit contains each prime implicant of f extended by at most w solely negated variables. The negation width of monotone circuits is zero. We first show that already a moderate allowed negation width can substantially decrease the size of monotone circuits. Our main result is a general reduction: if a monotone Boolean function f can be computed by a non-monotone circuit of size s and negation width w, then f can be also computed by a monotone circuit of size s times 4min⁡{wm,mw}log⁡M, where m is the maximum length of a prime implicant and M is the total number of prime implicants of f.

论文关键词:Boolean circuits,Monotone circuits,Lower bounds

论文评审过程:Received 26 April 2019, Revised 12 December 2021, Accepted 21 May 2022, Available online 27 May 2022, Version of Record 6 June 2022.

论文官网地址:https://doi.org/10.1016/j.jcss.2022.05.003