A Systolic Approach for Real Time Connected Component Labeling
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摘要
A new approach for sequentially labeling image components is described. The approach uses a two-pass algorithm that is suitable for both binary and multivalued images. The algorithm maps directly to a systolic array to provide real time performance in a VLSI implementation. The systolic array is used to modify the labels of recently visited pixels in a raster scan whenever a labeled equivalence is found. This overcomes the need for label equivalence tables used in previous algorithms. A two-pass system has been designed using the same custom VLSI chip for both passes with a frame delay after each pass. This has an advantage over previous hardware implementations where more complex algorithms require separate hardware modules for each pass.
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论文评审过程:Available online 24 April 2002.
论文官网地址:https://doi.org/10.1006/cviu.1995.1002