Volume 40, Number 12, December 2021
A Style-Based Analog Layout Migration Technique With Complete Routing Behavior Preservation.

Hao-Yu Chi Zi-Jun Lin Chia-Hao Hung Chien-Nan Jimmy Liu Hung-Ming Chen

Multilevel Dataflow-Driven Macro Placement Guided by RTL Structure and Analytical Methods.

Alex Vidal-Obiols Jordi Cortadella Jordi Petit Marc Galceran Oms Ferran Martorell

Therminator 2: A Fast Thermal Simulator for Portable Devices.

Mohammad Javad Dousti Qing Xie Mahdi Nazemi Massoud Pedram

On Improving Hotspot Detection Through Synthetic Pattern-Based Database Enhancement.

Gaurav Rajavendra Reddy Constantinos Xanthopoulos Yiorgos Makris

Power-Efficient Mapping of Large Applications on Modern Heterogeneous FPGAs.

Kalindu Herath Alok Prakash Suhaib A. Fahmy Thambipillai Srikanthan

Unary Coding and Variation-Aware Optimal Mapping Scheme for Reliable ReRAM-Based Neuromorphic Computing.

Yanan Sun Chang Ma Zhi Li Yilong Zhao Jiachen Jiang Weikang Qian Rui Yang Zhezhi He Li Jiang

A DVFS-Weakly Dependent Energy-Efficient Scheduling Approach for Deadline-Constrained Parallel Applications on Heterogeneous Systems.

Jing Huang Renfa Li Jiyao An Haibo Zeng Wanli Chang

Update Frequency-Directed Subpage Management for Mitigating Garbage Collection and DRAM Overheads.

Imran Fareed Mincheol Kang Wonyoung Lee Soontae Kim

Beyond Write-Reduction Consideration: A Wear-Leveling-Enabled B⁺-Tree Indexing Scheme Over an NVRAM-Based Architecture.

Dharamjeet Tseng-Yi Chen Yuan-Hao Chang Chun-Feng Wu Chi-Heng Lee Wei-Kuan Shih

ORACALL: An Oracle-Based Attack on Cellular Automata Guided Logic Locking.

Akashdeep Saha Hrivu Banerjee Rajat Subhra Chakraborty Debdeep Mukhopadhyay

A Lightweight Full Entropy TRNG With On-Chip Entropy Assurance.

Tianyu Chen Yuan Ma Jingqiang Lin Yuan Cao Na Lv Jiwu Jing


Volume 40, Number 11, November 2021
On the Stability of Analog ReLU Networks.

Ibrahim M. Elfadel

A Design Flow for Click-Based Asynchronous Circuits Design With Conventional EDA Tools.

Hui Wu Zhe Su Jilin Zhang Shaojun Wei Zhihua Wang Hong Chen

Recurrence in Dense-Time AMS Assertions.

Sayandeep Sanyal Antonio Anastasio Bruto da Costa Pallab Dasgupta

Methodology for Distributed-ROM-Based Implementation of Finite State Machines.

Raouf Senhadji-Navarro Ignacio Garcia-Vargas

Low-Cost EVM Measurement of ZigBee Transmitters From 1-bit Undersampled Acquisition.

T. Vayssade Florence Azaïs Laurent Latorre François Lefèvre

A Scalable Buffer Queue Sizing Algorithm for Latency Insensitive Systems.

Supriyo Maji Cheng-Kok Koh

WiND: An Efficient Post-Silicon Debug Strategy for Network on Chip.

Sidhartha Sankar Rout Sujay Deb Kanad Basu

Activity-Driven Task Allocation in Energy-Constrained Heterogeneous GPUs Systems.

Zhuowei Wang Xiaoyu Song Lianglun Cheng Hao Wang

Pin Accessibility Prediction and Optimization With Deep-Learning-Based Pin Pattern Recognition.

Tao-Chun Yu Shao-Yun Fang Hsien-Shih Chiu Kai-Shun Hu Philip Hui-Yuh Tai Cindy Chin-Fang Shen Henry Sheng

OpenMPL: An Open-Source Layout Decomposer.

Wei Li Yuzhe Ma Qi Sun Lu Zhang Yibo Lin Iris Hui-Ru Jiang Bei Yu David Z. Pan

GPU-Accelerated Adaptive PCBSO Mode-Based Hybrid RLA for Sparse LU Factorization in Circuit Simulation.

Wai-Kong Lee Ramachandra Achar

DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-Chip Training.

Xiaochen Peng Shanshi Huang Hongwu Jiang Anni Lu Shimeng Yu

Automated Design Space Exploration for Optimized Deployment of DNN on Arm Cortex-A CPUs.

Miguel de Prado Andrew Mundy Rabia Saeed Maurizio Denna Nuria Pazos Luca Benini

Hard-ODT: Hardware-Friendly Online Decision Tree Learning Algorithm and System.

Zhe Lin Sharad Sinha Wei Zhang

RANC: Reconfigurable Architecture for Neuromorphic Computing.

Joshua Mack Ruben Purdy Kris Rockowitz Michael Inouye Edward Richter Spencer Valancius Nirmal Kumbhare Md Sahil Hassan Kaitlin Lindsay Fair John Mixter Ali Akoglu

Splitter-Aware Multiterminal Routing With Length-Matching Constraint for RSFQ Circuits.

Mingyang Kou Pei-Yi Cheng Jun Zeng Tsung-Yi Ho Kazuyoshi Takagi Hailong Yao

Reducing SRAM Reading Power With Column Data Segment and Weights Correlation Enhancement for CNN Processing.

Han Xu Ziwei Li Ziru Li Deliang Fan Fei Qiao Qi Wei Li Luo Xinjun Liu Huazhong Yang

iCheck: Progressive Checkpointing for Intermittent Systems.

Wen Sheng Lim Chia-Heng Tu Chun-Feng Wu Yuan-Hao Chang

Efficient Federated Learning for Cloud-Based AIoT Applications.

Xinqian Zhang Ming Hu Jun Xia Tongquan Wei Mingsong Chen Shiyan Hu

Analog Building Blocks Optimization for Low-Pass Filter of IEEE 802.11n Wireless LAN: OTA and CCII.

Ersin Alaybeyoglu Faruk Ugranli


Volume 40, Number 10, October 2021
PROWAVES: Proactive Runtime Wavelength Selection for Energy-Efficient Photonic NoCs.

Aditya Narayan Yvain Thonnart Pascal Vivet Ayse K. Coskun

Attack-Aware Detection and Defense to Resist Adversarial Examples.

Wei Jiang Zhiyuan He Jinyu Zhan Weijia Pan

Storage-Based Built-In Self-Test for Gate-Exhaustive Faults.

Irith Pomeranz

Three-Input Gates for Logic Synthesis.

Dewmini Sudara Marakkalage Eleonora Testa Heinz Riener Alan Mishchenko Mathias Soeken Giovanni De Micheli

A Deflection-Based Deadlock Recovery Framework to Achieve High Throughput for Faulty NoCs.

Yibo Wu Liang Wang Xiaohang Wang Jie Han Shouyi Yin Shaojun Wei Leibo Liu

SP&R: SMT-Based Simultaneous Place-and-Route for Standard Cell Synthesis of Advanced Nodes.

Daeyeal Lee Dongwon Park Chia-Tung Ho Ilgweon Kang Hayoung Kim Sicun Gao Bill Lin Chung-Kuan Cheng

Mixed-Cell-Height Detailed Placement Considering Complex Minimum-Implant-Area Constraints.

Jianli Chen Yao-Wen Chang Yen-Yi Wu

An Efficient and Accurate Variation-Aware Design Methodology for Near-Threshold MOS-Varactor-Based VCO Architectures.

Lalit Mohan Dani Neeraj Mishra Anand Bulusu

Reducing Microfluidic Very Large-Scale Integration (mVLSI) Chip Area by Seam Carving.

Brian Crites Cody Falzone Tristan Lopez Karen Kong Philip Brisk

AirNN: A Featherweight Framework for Dynamic Input-Dependent Approximation of CNNs.

Maedeh Hemmat Joshua San Miguel Azadeh Davoodi

Bias Busters: Robustifying DL-Based Lithographic Hotspot Detectors Against Backdooring Attacks.

Kang Liu Benjamin Tan Gaurav Rajavendra Reddy Siddharth Garg Yiorgos Makris Ramesh Karri

Enhancing the Reliability of MEDA Biochips Using IJTAG and Wear Leveling.

Zhanwei Zhong Tung-Che Liang Krishnendu Chakrabarty

Rescuing RRAM-Based Computing From Static and Dynamic Faults.

Jilan Lin Cheng-Da Wen Xing Hu Tianqi Tang Ing-Chao Lin Yu Wang Yuan Xie

Realization of Logic Functions Using Switching Lattices Under a Delay Constraint.

Levent Aksoy Nihat Akkan Herman Sedef Mustafa Altun

Bridging Mismatched Granularity Between Embedded File Systems and Flash Memory.

Runyu Zhang Duo Liu Zhaoyan Shen Xiongxiong She Chaoshu Yang Xianzhang Chen Yujuan Tan Chengliang Wang

Power-Aware Runtime Scheduler for Mixed-Criticality Systems on Multicore Platform.

Behnaz Ranjbar Tuan D. A. Nguyen Alireza Ejlali Akash Kumar

Deep Learning Analysis for Split-Manufactured Layouts With Routing Perturbation.

Haocheng Li Satwik Patnaik Mohammed Ashraf Haoyu Yang Johann Knechtel Bei Yu Ozgur Sinanoglu Evangeline F. Y. Young

On-Chip Trust Evaluation Utilizing TDC-Based Parameter-Adjustable Security Primitive.

Haocheng Ma Jiaji He Yanjiang Liu Jun Kuai He Li Leibo Liu Yiqiang Zhao

Dynamic Radial Placement and Routing in Paper Microfluidics.

Joshua Potter William H. Grover Philip Brisk

Optimizing Vertical Link Placement and Congestion Aware Dynamic Elevator Assignment for Partially Connected 3D-NoCs.

Yuxiang Fu Chuan Zhang Wenqing Song Qinyu Chen Hui Chen Minghao Zhou Li Li


Volume 40, Number 9, September 2021
A Cost-Effective TSV Repair Architecture for Clustered Faults in 3-D IC.

Tianming Ni Qi Xu Zhengfeng Huang Huaguo Liang Aibin Yan Xiaoqing Wen

Enhancing the Utilization of Processing Elements in Spatial Deep Neural Network Accelerators.

Mohammadreza Asadikouhanjani Seok-Bum Ko

Verifying Asymptotic Temporal Properties of Continuous-State Probabilistic Systems.

Natsuki Urabe Rupak Majumdar

Board-Level Functional Fault Identification Using Streaming Data.

Mengyun Liu Fangming Ye Xin Li Krishnendu Chakrabarty Xinli Gu

Novel Guiding Template and Mask Assignment for DSA-MP Hybrid Lithography Using Multiple BCP Materials.

Yi-Ting Lin Iris Hui-Ru Jiang

Efficient Comparison and Addition for FHE With Weighted Computational Complexity Model.

Neng Zhang Qiao Qin Zongsheng Hou Bohan Yang Shouyi Yin Shaojun Wei Leibo Liu

A Compact Gated-Synapse Model for Neuromorphic Circuits.

Alexander Jones Rashmi Jha

A Data-Driven Asynchronous Neural Network Accelerator.

Shanlin Xiao Weikun Liu Junshu Lin Zhiyi Yu

Sparse Tucker Tensor Decomposition on a Hybrid FPGA-CPU Platform.

Weiyun Jiang Kaiqi Zhang Colin Yu Lin Feng Xing Zheng Zhang

Combining Static and Dynamic Load Balance in Parallel Routing for FPGAs.

Minghua Shen Guojie Luo Nong Xiao

Ant Colony Optimization-Based Thermal-Aware Adaptive Routing Mechanism for Optical NoCs.

Jing Wang Yaoyao Ye

Exploring the Potential Benefits of Alternative Quantum Computing Architectures.

Arighna Deb Gerhard W. Dueck Robert Wille

Advanced Equivalence Checking for Quantum Circuits.

Lukas Burgholzer Robert Wille

Toward Hardware-Efficient Optical Neural Networks: Beyond FFT Architecture via Joint Learnability.

Jiaqi Gu Zheng Zhao Chenghao Feng Zhoufeng Ying Mingjie Liu Ray T. Chen David Z. Pan

iTRIM: I/O-Aware TRIM for Improving User Experience on Mobile Devices.

Yu Liang Cheng Ji Chenchen Fu Rachata Ausavarungnirun Qiao Li Riwei Pan Siyu Chen Liang Shi Tei-Wei Kuo Chun Jason Xue

DESCNet: Developing Efficient Scratchpad Memories for Capsule Network Hardware.

Alberto Marchisio Vojtech Mrazek Muhammad Abdullah Hanif Muhammad Shafique

ReLAccS: A Multilevel Approach to Accelerator Design for Reinforcement Learning on FPGA-Based Systems.

Akhil Raj Baranwal Salim Ullah Siva Satyendra Sahoo Akash Kumar

Thwarting All Logic Locking Attacks: Dishonest Oracle With Truly Random Logic Locking.

Nimisha Limaye Emmanouil Kalligeros Nikolaos Karousos Irene G. Karybali Ozgur Sinanoglu

Defending Hardware-Based Malware Detectors Against Adversarial Attacks.

Abraham Peedikayil Kuruvila Shamik Kundu Kanad Basu


Volume 40, Number 8, August 2021
A VHDL-Based Modeling Approach for Rapid Functional Simulation and Verification of Adiabatic Circuits.

Sachin Maheshwari Viv A. Bartlett Izzet Kale

Hybrid Pass/Fail and Full Fail Data for Reduced Fail Data Volume.

Irith Pomeranz M. Enamul Amyeen

Memristor-Based Edge Computing of ShuffleNetV2 for Image Classification.

Huanhuan Ran Shiping Wen Shiqin Wang Yuting Cao Pan Zhou Tingwen Huang

Cpp-Taskflow: A General-Purpose Parallel Task Programming System at Scale.

Tsung-Wei Huang Yibo Lin Chun-Xun Lin Guannan Guo Martin D. F. Wong

Autonomous Application of Netlist Transformations Inside Lagrangian Relaxation-Based Optimization.

Apostolos Stefanidis Dimitrios Mangiras Chrysostomos Nicopoulos David G. Chinnery Giorgos Dimitrakopoulos

Diagonal Matrix Regression Layer: Training Neural Networks on Resistive Crossbars With Interconnect Resistance Effect.

Yan Liao Bin Gao Peng Yao Wenqiang Zhang Jianshi Tang Huaqiang Wu He Qian

OMNI: A Framework for Integrating Hardware and Software Optimizations for Sparse CNNs.

Yun Liang Liqiang Lu Jiaming Xie

CKFO: Convolution Kernel First Operated Algorithm With Applications in Memristor-Based Convolutional Neural Network.

Shiping Wen Jiadong Chen Yingcheng Wu Zheng Yan Yuting Cao Yin Yang Tingwen Huang

Accurate Recycled FPGA Detection Using an Exhaustive-Fingerprinting Technique Assisted by WID Process Variation Modeling.

Foisal Ahmed Michihiro Shintani Michiko Inoue

DUPRFloor: Dynamic Modeling and Floorplanning for Partially Reconfigurable FPGAs.

Jinyu Wang Yifei Kang Weiguo Wu Guoliang Xing Linlin Tu

TRAVERSAL: A Fast and Adaptive Graph-Based Placement and Routing for CGRAs.

Michael Canesche Marcelo M. Menezes Westerley Carvalho Frank Sill Torres Peter Jamieson José Augusto Miranda Nacif Ricardo S. Ferreira

DLUX: A LUT-Based Near-Bank Accelerator for Data Center Deep Learning Training Workloads.

Peng Gu Xinfeng Xie Shuangchen Li Dimin Niu Hongzhong Zheng Krishna T. Malladi Yuan Xie

nZESPA: A Near-3D-Memory Zero Skipping Parallel Accelerator for CNNs.

Palash Das Hemangee K. Kapoor

Freezer: A Specialized NVM Backup Controller for Intermittently Powered Systems.

Davide Pala Ivan Miro-Panades Olivier Sentieys

A Compile-Time Framework for Tolerating Read Disturbance in STT-RAM.

Fateme S. Hosseini Chengmo Yang

Trace Logic Locking: Improving the Parametric Space of Logic Locking.

Michael Zuzak Yuntao Liu Ankur Srivastava

RF Switched-Capacitor Power Amplifier Modeling.

Paul P. Sotiriadis Christos G. Adamopoulos Dimitrios Baxevanakis Panagiotis G. Zarkos Iason Vassiliou

An LDE-Aware gm/ID-Based Hybrid Sizing Method for Analog Integrated Circuits.

Tuotian Liao Lihong Zhang

TSV-Cluster Defect Tolerance Using Tree-Based Redundancy for Yield Improvement of 3-D ICs.

Dilip Kumar Maity Surajit Kumar Roy Chandan Giri


Volume 40, Number 7, July 2021
Tinker: A Middleware for Deploying Multiple NN-Based Applications on a Single Machine.

Chao Wang Lihui Jin Lei Gong Chongchong Xu Yahui Hu Luchao Tan Xuehai Zhou

A Formal Proof of PG Recurrence Equations of Parallel Adders.

Gang Chen Xiaoyu Song Guowu Yang Ting Wang Xiaoqiao Mu Yongqian Fan

Efficient Layout Hotspot Detection via Binarized Residual Neural Network Ensemble.

Yiyang Jiang Fan Yang Bei Yu Dian Zhou Xuan Zeng

Bridging the Gap Between Layout Pattern Sampling and Hotspot Detection via Batch Active Learning.

Haoyu Yang Shuhe Li Cyrus Tabery Bingqing Lin Bei Yu

Synchronization of Continuous Time and Discrete Events Simulation in SystemC.

Breytner Fernández-Mesa Liliana Andrade Frédéric Pétrot

Efficient and Accuracy-Ensured Waveform Compression for Transient Circuit Simulation.

Lingjie Li Wenjian Yu

SeFAct2: Selective Feature Activation for Energy-Efficient CNNs Using Optimized Thresholds.

Farhana Sharmin Snigdha Susmita Dey Manasi Jiang Hu Sachin S. Sapatnekar

Simultaneously Tolerate Thermal and Process Variations Through Indirect Feedback Tuning for Silicon Photonic Networks.

Xuanqi Chen Jun Feng Jiang Xu Jiaxu Zhang Shixi Chen

Leveraging the Interplay of RAID and SSD for Lifetime Optimization of Flash-Based SSD RAID.

Zhaoyan Shen Lei Han Chenlin Ma Zhiping Jia Tao Li Zili Shao

Reduced Worst-Case Communication Latency Using Single-Cycle Multihop Traversal Network-on-Chip.

Peng Chen Weichen Liu Hui Chen Shiqing Li Mengquan Li Lei Yang Nan Guan

Making Frequent-Pattern Mining Scalable, Efficient, and Compact on Nonvolatile Memories.

Chaoshu Yang Po-Chun Huang Yi Lin Jiaqi Dong Duo Liu Yujuan Tan Liang Liang

LiveSSD: A Low-Interference RAID Scheme for Hardware Virtualized SSDs.

You Zhou Fei Wu Weizhou Huang Changsheng Xie

CacheTree: Reducing Integrity Verification Overhead of Secure Nonvolatile Memories.

Zhengguo Chen Youtao Zhang Nong Xiao

Chaotic Weights: A Novel Approach to Protect Intellectual Property of Deep Neural Networks.

Ning Lin Xiaoming Chen Hang Lu Xiaowei Li

Detecting Failures and Attacks via Digital Sensors.

Md Toufiq Hasan Anik Jean-Luc Danger Sylvain Guilley Naghmeh Karimi

Security Against Data-Sniffing and Alteration Attacks in IJTAG.

Rana Elnaggar Ramesh Karri Krishnendu Chakrabarty

Scalable Activation of Rare Triggers in Hardware Trojans by Repeated Maximal Clique Sampling.

Yangdi Lyu Prabhat Mishra

Leveraging Spatial Correlation for Sensor Drift Calibration in Smart Building.

Tinghuan Chen Bingqing Lin Hao Geng Shiyan Hu Bei Yu


Volume 40, Number 6, June 2021
Erratum to "Predictive Guardbanding: Program-Driven Timing Margin Reduction for GPUs".

Jingwen Leng Alper Buyuktosunoglu Ramon Bertran Pradip Bose Yazhou Zu Vijay Janapa Reddi

REIN the RobuTS: Robust DNN-Based Image Recognition in Autonomous Driving Systems.

Fuxun Yu Zhuwei Qin Chenchen Liu Di Wang Xiang Chen

Training Data Poisoning in ML-CAD: Backdooring DL-Based Lithographic Hotspot Detectors.

Kang Liu Benjamin Tan Ramesh Karri Siddharth Garg

Practical Attacks on Deep Neural Networks by Memory Trojaning.

Xing Hu Yang Zhao Lei Deng Ling Liang Pengfei Zuo Jing Ye Yingyan Lin Yuan Xie

2Deep: Enhancing Side-Channel Attacks on Lattice-Based Key-Exchange via 2-D Deep Learning.

Priyank Kashyap Furkan Aydin Seetal Potluri Paul D. Franzon Aydin Aysu

Multilabel Deep Learning-Based Side-Channel Attack.

Libang Zhang Xinpeng Xing Junfeng Fan Zongyue Wang Suying Wang

A Computationally Efficient Tensor Regression Network-Based Modeling Attack on XOR Arbiter PUF and Its Variants.

Pranesh Santikellur Rajat Subhra Chakraborty

A Modeling Attack Resistant Deception Technique for Securing Lightweight-PUF-Based Authentication.

Chongyan Gu Chip-Hong Chang Weiqiang Liu Shichao Yu Yale Wang Máire O'Neill

An All-MOSFET Voltage Reference-Based PUF Featuring Low BER Sensitivity to VT Variations and 163 fJ/Bit in 180-nm CMOS.

Peizhou Gan Xiaojin Zhao Yuan Cao

Toward Hardware-Based IP Vulnerability Detection and Post-Deployment Patching in Systems-on-Chip.

Benjamin Tan Rana Elnaggar Jason M. Fung Ramesh Karri Krishnendu Chakrabarty

hPRESS: A Hardware-Enhanced Proxy Re-Encryption Scheme Using Secure Enclave.

Fan Zhang Ziyuan Liang Cong Zuo Jun Shao Jianting Ning Jun Sun Joseph K. Liu Yibao Bao

VoltJockey: A New Dynamic Voltage Scaling-Based Fault Injection Attack on Intel SGX.

Pengfei Qiu Dongsheng Wang Yongqiang Lyu Ruidong Tian Chunlu Wang Gang Qu

A Persistent Fault-Based Collision Analysis Against the Advanced Encryption Standard.

Shihui Zheng Xudong Liu Shoujin Zang Yihao Deng Dongqi Huang Changhai Ou

Pushing the Limit of PFA: Enhanced Persistent Fault Analysis on Block Ciphers.

Guorui Xu Fan Zhang Bolin Yang Xinjie Zhao Wei He Kui Ren

Entropy Reduction Model for Pinpointing Differential Fault Analysis on SIMON and SIMECK Ciphers.

Naman Singhal Priyanka Joshi Bodhisatwa Mazumdar

Security-Driven Placement and Routing Tools for Electromagnetic Side-Channel Protection.

Haocheng Ma Jiaji He Yanjiang Liu Leibo Liu Yiqiang Zhao Yier Jin

Design and Evaluation of Fluctuating Power Logic to Mitigate Power Analysis at the Cell Level.

Fan Zhang Bolin Yang Bojie Yang Yiran Zhang Xuanle Ren Shivam Bhasin Kui Ren

Information Entropy-Based Leakage Profiling.

Changhai Ou Xinping Zhou Siew-Kei Lam Chengju Zhou Fangxin Ning

The Science of Guessing in Collision-Optimized Divide-and-Conquer Attacks.

Changhai Ou Siew-Kei Lam Guiyuan Jiang

An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools.

Wei Hu Chip-Hong Chang Anirban Sengupta Swarup Bhunia Ryan Kastner Hai Li

Editorial.

Rajesh K. Gupta David Atienza


Volume 40, Number 5, May 2021
Padding of LFSR Seeds for Reduced Input Test Data Volume.

Irith Pomeranz

Reliable Architectures for Composite-Field-Oriented Constructions of McEliece Post-Quantum Cryptography on FPGA.

Alvaro Cintas Canto Mehran Mozaffari Kermani Reza Azarderakhsh

Enhanced Design Debugging With Assistance From Guidance-Based Model Checking.

V. S. Vineesh Binod Kumar Rushikesh Shinde Neelam Sharma Masahiro Fujita Virendra Singh

AccuReD: High Accuracy Training of CNNs on ReRAM/GPU Heterogeneous 3-D Architecture.

Biresh Kumar Joardar Janardhan Rao Doppa Partha Pratim Pande Hai Li Krishnendu Chakrabarty

From IC Layout to Die Photograph: A CNN-Based Data-Driven Approach.

Hao-Chiang Shao Chao-Yi Peng Jun-Rei Wu Chia-Wen Lin Shao-Yun Fang Pin-Yen Tsai Yan-Hsiu Liu

Length-Matching-Constrained Region Routing in Rapid Single-Flux-Quantum Circuits.

Jin-Tai Yan

Semi-Analytical Path Delay Variation Model With Adjacent Gates Decorrelation for Subthreshold Circuits.

Jingjing Guo Peng Cao Mengxiao Li Yu Gong Zhiyuan Liu Geng Bai Jun Yang

An Edge 3D CNN Accelerator for Low-Power Activity Recognition.

Ying Wang Yongchen Wang Cong Shi Long Cheng Huawei Li Xiaowei Li

Constraint Solving for Synthesis and Verification of Threshold Logic Circuits.

Nian-Ze Lee Jie-Hong R. Jiang

Allocation of Multibit Retention Flip-Flops for Power Gated Circuits: Algorithm-Design Unified Approach.

Gyoung-Hwan Hyun Taewahn Kim

Cheetah: An Accurate Assessment Mechanism and a High-Throughput Acceleration Architecture Oriented Toward Resource Efficiency.

Xinyuan Qu Zhihong Huang Yu Xu Ning Mao Gang Cai Zhen Fang

STAR: Synthesis of Stateful Logic in RRAM Targeting High Area Utilization.

Feng Wang Guojie Luo Guangyu Sun Jiaxi Zhang Jinfeng Kang Yuhao Wang Dimin Niu Hongzhong Zheng

Exploiting Process Variations to Secure Photonic NoC Architectures From Snooping Attacks.

Sai Vineel Reddy Chittamuru Ishan G. Thakkar Sudeep Pasricha Sairam Sri Vatsavai Varun Bhat

Computational Restructuring: Rethinking Image Compression Using Resistive Crossbar Arrays.

Baogang Zhang Necati Uysal Rickard Ewetz

Analog and Mixed-Signal IC Security via Sizing Camouflaging.

Julian Leonhard Alhassan Sayed Marie-Minerve Louërat Hassan Aboushady Haralampos-G. D. Stratigopoulos

Evaluating Neural Network-Inspired Analog-to-Digital Conversion With Low-Precision RRAM.

Weidong Cao Ke Liu Ayan Chakrabarti Xuan Zhang


Volume 40, Number 4, April 2021
PRESERVE: Static Test Compaction that Preserves Individual Numbers of Tests.

Irith Pomeranz

Test Chips With Scan-Based Logic Arrays.

Yu-Hsiang Chen Chia-Ming Hsu Kuen-Jong Lee

OpenTimer v2: A New Parallel Incremental Timing Analysis Engine.

Tsung-Wei Huang Guannan Guo Chun-Xun Lin Martin D. F. Wong

Improving Multilevel Writes on Vertical 3-D Cross-Point Resistive Memory.

Chengning Wang Dan Feng Wei Tong Yu Hua Jingning Liu Bing Wu Wei Zhao Linghao Song Yang Zhang Jie Xu Xueliang Wei Yiran Chen

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement.

Yibo Lin Zixuan Jiang Jiaqi Gu Wuxi Li Shounak Dhar Haoxing Ren Brucek Khailany David Z. Pan

SAT-Based On-Track Bus Routing.

He-Teng Zhang Masahiro Fujita Chung-Kuan Cheng Jie-Hong R. Jiang

Modeling Multiple-Input Switching in Timing Analysis Using Machine Learning.

O. V. S. Shashank Ram Sneh Saurabh

SPICE Compact BJT, MOSFET, and JFET Models for ICs Simulation in the Wide Temperature Range (From -200 °C to +300 °C).

Konstantin O. Petrosyants Lev M. Sambursky Maxim V. Kozhukhov Mamed R. Ismail-Zade Igor A. Kharitonov Bo Li

Post-Silicon Heat-Source Identification and Machine-Learning-Based Thermal Modeling Using Infrared Thermal Imaging.

Sheriff Sadiqbatcha Jinwei Zhang Hengyang Zhao Hussam Amrouch Jörg Henkel Sheldon X.-D. Tan

Modeling and Simulating Electromagnetic Fault Injection.

Mathieu Dumont Mathieu Lisart Philippe Maurine

FPGA Acceleration for 3-D Low-Dose Tomographic Reconstruction.

Wentai Zhang Linjun Qiao William Hsu Yong Cui Ming Jiang Guojie Luo

A Design Framework for Invertible Logic.

Naoya Onizawa Kaito Nishino Sean C. Smithson Brett H. Meyer Warren J. Gross Hitoshi Yamagata Hiroyuki Fujita Takahiro Hanyu

READY: Reliability- and Deadline-Aware Power-Budgeting for Heterogeneous Multicore Systems.

Javad Saber-Latibari Mohsen Ansari Pourya Gohari-Nazari Sina Yari-Karin Amir Mahdi Hosseini Monazzah Alireza Ejlali

Investigating Frequency Scaling, Nonvolatile, and Hybrid Memory Technologies for On-Chip Routers to Support the Era of Dark Silicon.

Khushboo Rani Hemangee K. Kapoor

SNR-Centric Power Trace Extractors for Side-Channel Attacks.

Changhai Ou Siew-Kei Lam Degang Sun Xinping Zhou Kexin Qiao Qu Wang

Evaluating the Security of Delay-Locked Circuits.

Abhishek Chakraborty Yuntao Liu Ankur Srivastava


Volume 40, Number 3, March 2021
A Novel and Unified Full-Chip CMP Model Aware Dummy Fill Insertion Framework With SQP-Based Optimization Method.

Junzhe Cai Changhao Yan Yudong Tao Yibo Lin Sheng-Guo Wang David Z. Pan Xuan Zeng

Maximal Independent Fault Set for Gate-Exhaustive Faults.

Irith Pomeranz

Defect-Oriented Test: Effectiveness in High Volume Manufacturing.

Friedrich Hapke Will Howell Peter C. Maxwell Edward Brazil Srikanth Venkataraman Rudrajit Dutta Andreas Glowatz Anja Fast Janusz Rajski

Robust Deep Reservoir Computing Through Reliable Memristor With Improved Heat Dissipation Capability.

Hongyu An Mohammad Shah Al-Mamun Marius Orlowski Lingjia Liu Yang Yi

Analytical Placement Considering the Electron-Beam Fogging Effect.

Jianli Chen Yao-Wen Chang Yu-Chen Huang

TritonRoute: The Open-Source Detailed Router.

Andrew B. Kahng Lutong Wang Bangqi Xu

A DAG-Based Algorithm for Obstacle-Aware Topology-Matching On-Track Bus Routing.

Chen-Hao Hsu Shao-Chun Hung Hao Chen Fan-Keng Sun Yao-Wen Chang

A Novel Memristive Chaotic Neuron Circuit and Its Application in Chaotic Neural Networks for Associative Memory.

Chaoxun Pan Qinghui Hong Xiaoping Wang

Fast Physics-Based Electromigration Analysis for Full-Chip Networks by Efficient Eigenfunction-Based Solution.

Xiaoyi Wang Shaobin Ma Sheldon X.-D. Tan Chase Cook Liang Chen Jianlei Yang Wenjian Yu

Pin Assignment Optimization for Multi-2.5D FPGA-Based Systems With Time-Multiplexed I/Os.

Yu-Chen Liao Wai-Kei Mak

RTL to Transistor Level Power Modeling and Estimation Techniques for FPGA and ASIC: A Survey.

Yehya Nasser Jordane Lorandel Jean-Christophe Prévotet Maryline Hélard

FUNCODE: Effective Device-to-System Analysis of Field-Coupled Nanocomputing Circuit Designs.

Umberto Garlando Fabrizio Riente Mariagrazia Graziano

Toward Efficient Execution of Mainstream Deep Learning Frameworks on Mobile Devices: Architectural Implications.

Yuting Dai Rui Zhang Rui Xue Benyong Liu Tao Li

Improving the Forward Progress of Transient Systems.

Tim Daulby Anand Savanth Geoff V. Merrett Alex S. Weddell

An Efficient Data Migration Scheme to Optimize Garbage Collection in SSDs.

Shunzhuo Wang You Zhou Jiaona Zhou Fei Wu Changsheng Xie

CHANCE: Capacitor Charging Management Scheme in Energy Harvesting Systems.

Ali Hoseinghorban Mohammad Reza Bahrami Alireza Ejlali Mohammad Ali Abam

Physically Unclonable and Reconfigurable Computing System (PURCS) for Hardware Security Applications.

Aysha S. Shanta Md. Badruddoja Majumder Md Sakib Hasan Garrett S. Rose


Volume 40, Number 2, February 2021
Manufacturability Enhancement With Dummy via Insertion for DSA-MP Lithography Using Multiple BCP Materials.

Yun-Jhe Jiang Kuo-Hao Wu Shao-Yun Fang

Black-Box Test-Cost Reduction Based on Bayesian Network Models.

Renjian Pan Zhaobo Zhang Xin Li Krishnendu Chakrabarty Xinli Gu

GAN-SRAF: Subresolution Assist Feature Generation Using Generative Adversarial Networks.

Mohamed Baker Alawieh Yibo Lin Zaiwei Zhang Meng Li Qixing Huang David Z. Pan

Flux Controlled Floating Memristor Employing VDTA: Incremental or Decremental Operation.

John Vista Ashish Ranjan

A Fast Semi-Analytic Approach for Combined Electromigration and Thermomigration Analysis for General Multisegment Interconnects.

Liang Chen Sheldon X.-D. Tan Zeyu Sun Shaoyi Peng Min Tang Junfa Mao

Automatic Design of Droplet-Based Microfluidic Ring Networks.

Gerold Fink Medina Hamidovic Werner Haselmayr Robert Wille

RxNN: A Framework for Evaluating Deep Neural Networks on Resistive Crossbars.

Shubham Jain Abhronil Sengupta Kaushik Roy Anand Raghunathan

Multistage Multirate Transfer Function Automated Synthesis Using Hybrid Sampling Strategy-Based Differential Evolution.

Amr G. Wassal Ahmed M. Ibrahim Ayman AboElHassan

CNN-on-AWS: Efficient Allocation of Multikernel Applications on Multi-FPGA Platforms.

Junnan Shan Mihai T. Lazarescu Jordi Cortadella Luciano Lavagno Mario R. Casu

Efficient and Robust RRAM-Based Convolutional Weight Mapping With Shifted and Duplicated Kernel.

Yuhang Zhang Guanghui He Guoxing Wang Yongfu Li

Pearl: Performance-Aware Wear Leveling for Nonvolatile FPGAs.

Hao Zhang Ke Liu Mengying Zhao Zhaoyan Shen Xiaojun Cai Zhiping Jia

Contention-Aware Routing for Thermal-Reliable Optical Networks-on-Chip.

Mengquan Li Weichen Liu Luan H. K. Duong Peng Chen Lei Yang Chunhua Xiao

DiReCtX: Dynamic Resource-Aware CNN Reconfiguration Framework for Real-Time Mobile Applications.

Zirui Xu Fuxun Yu Zhuwei Qin Chenchen Liu Xiang Chen

Limited Busy Periods in Response Time Analysis for Tasks Under Global EDF Scheduling.

Quan Zhou Guohui Li Chunyang Zhou Jianjun Li

Optimizing Lifetime Capacity and Read Performance of Bit-Alterable 3-D NAND Flash.

Shuo-Han Chen Ming-Chang Yang Yuan-Hao Chang

An Efficient Analysis Method for LTCC Ridge Waveguide Bandpass Filters via Database Searching.

Xinmi Yang Jiayue Li Xueguan Liu Changrong Liu Kemeng Huang Bo Hou


Volume 40, Number 1, January 2021
A Table-Free Approximate Q-Learning-Based Thermal-Aware Adaptive Routing for Optical NoCs.

Wenfei Zhang Yaoyao Ye

Access-Time Minimization for the IJTAG Network Using Data Broadcast and Hardware Parallelism.

Zhanwei Zhong Guoliang Li Qinfu Yang Krishnendu Chakrabarty

Predictive Guardbanding: Program-Driven Timing Margin Reduction for GPUs.

Jingwen Leng Alper Buyuktosunoglu Ramon Bertran Pradip Bose Yazhou Zu Vijay Janapa Reddi

A General Time-Domain Method for Harmonic Distortion Estimation in CMOS Circuits.

Dimitrios Baxevanakis Paul P. Sotiriadis

How Secure Are Checkpoint-Based Defenses in Digital Microfluidic Biochips?

Mohammed Shayan Sukanta Bhattacharjee Robert Wille Krishnendu Chakrabarty Ramesh Karri

ITT-RNA: Imperfection Tolerable Training for RRAM-Crossbar-Based Deep Neural-Network Accelerator.

Zhuoran Song Yanan Sun Lerong Chen Tianjian Li Naifeng Jing Xiaoyao Liang Li Jiang

DCSA: Distributed Channel-Storage Architecture for Flow-Based Microfluidic Biochips.

Chunfeng Liu Xing Huang Bing Li Hailong Yao Paul Pop Tsung-Yi Ho Ulf Schlichtmann

Reduce Loss and Crosstalk in Integrated Silicon-Photonic Multistage Switching Fabrics Through Multichip Partition.

Zhehui Wang Zhifei Wang Jiang Xu Jun Feng Shixi Chen Xuanqi Chen Jiaxu Zhang

Integrating LSM Trees With Multichip Flash Translation Layer for Write-Efficient KVSSDs.

Sung-Ming Wu Kai-Hsiang Lin Li-Pin Chang

Energy-Aware Mixed-criticality Sporadic Task Scheduling Algorithm.

Yiwen Zhang

DEPS: Exploiting a Dynamic Error Prechecking Scheme to Improve the Read Performance of SSD.

Weihua Liu Fei Wu Meng Zhang Chengmo Yang Zhonghai Lu Jiguang Wan Changsheng Xie

SmartHeating: On the Performance and Lifetime Improvement of Self-Healing SSDs.

Jinhua Cui Junwei Liu Jianhang Huang Laurence T. Yang

Increased Output Corruption and Structural Attack Resilience for SAT Attack Secure Logic Locking.

Kyle Juretus Ioannis Savidis

Hardware Trojan Detection Using Backside Optical Imaging.

Boyou Zhou Aydan Aksoylar Kyle Vigil Ronen Adato Jian Tan Bennett B. Goldberg M. Selim Ünlü Ajay Joshi

Synthesis of Hidden State Transitions for Sequential Logic Locking.

Kyle Juretus Ioannis Savidis

Layerwise Buffer Voltage Scaling for Energy-Efficient Convolutional Neural Network.

Minho Ha Younghoon Byun Seungsik Moon Youngjoo Lee Sunggu Lee